LF398S8#PBF

LF398S8#PBF is a precision sample and hold amplifier which uses a combination of bipolar and junction FET transistors to provide precision, high speed, and long hold times. A typical offset voltage of 2mV and gain error of 0.004% low this sample and hold amplifier to be used in 12bit systems. Dynamic performance can be optimized by processor selection of the external hold capacitor. Acquisition times can be as low 4µs for small capacitors while hold step and droop errors can be held below 0.1mW and 30µV/sec respectively when using larger capacitors. The logic input is high impedance differential to allow easy interfacing to any logic family without ground loop problems. A separate offset adjust pin can be used zero the offset voltage in either the sampler hold mode. Application includes 12bit data acquisition systems, ramp generators, analogue switches, staircase generators, sample and difference circuit.

• High input impedance under all conditions, logic input compatible with all logic families
• 2mW typical input offset voltage, 10nA typical input bias current
• 0.004% typical gain error (RL=10K)
• 96dB typical feedthrough attenuation ratio at 1KHz (Ch=0.01F)
• 0.5ohm typical output impedance ("hold" mode)
• 4.5mA typical supply current (Tj = 25°C)
• 2µA typical logic and logic reference input current
• 5mA typical hold capacitor charging current (Vin-Vout = 2V)
• 110dB typical supply voltage rejection ratio (Vout=0)
• 8 pin plastic SO package, operating temperature range from 0 to 70°C

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