AD9516-4BCPZ

AD9516-4 is a 14-output clock generator with integrated 1.6GHz VCO. It provides a multi-output clock distribution function with subpicosecond jitter performance and an on-chip PLL and VCO. The on-chip VCO tunes from 1.45GHz to 1.80GHz. It emphasizes low jitter and phase noise to maximize data converter performance, and it can benefit other applications with demanding phase noise and jitter requirements. It features six LVPECL outputs and four LVDS outputs. Each LVDS output can be reconfigured as two CMOS outputs. The LVPECL outputs operate to 1.6GHz, the LVDS outputs operate to 800MHz, and the CMOS outputs operate to 250MHz. Application includes low jitter, low phase noise clock distribution, 10/40/100Gb/sec networking line cards, including SONET, synchronous Ethernet, OTU2/3/4, forward error correction, clocking high-speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs, high performance wireless transceivers, ATE and high-performance instrumentation.

• Reference monitoring capability, automatic revertive and manual reference switchover/holdover modes
• Programmable delays in path to PFD, digital or analogue lock detect, selectable
• Each output pair shares a 1-to-32 divider with coarse phase delay
• Channel-to-channel skew paired outputs of <lt/>10ps, fine delay adjust (Δt) on each LVDS output
• Automatic synchronization of all outputs on power-up
• Frequency range from 1450 to 1800MHz (VS = VS-LVPECL = 3.3V ± 5%, VS ≤ VCP ≤ 5.25V, TA = 25°C)
• VCO gain (KVCO) is 50MHz/V (typ, VS = VS-LVPECL = 3.3V ± 5%, VS ≤ VCP ≤ 5.25V, TA = 25°C)
• Frequency pushing (open-loop) is 0.5MHz/V (typ, VS = VS-LVPECL = 3.3V ± 5%, TA = 25°C)
• Maximum PFD input frequency is 100MHz (antibacklash pulse width = 1.3ns, 2.9ns, TA = 25°C)
• 64-lead LFCSP-VQ package, temperature range from -40°C to +85°C

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