AD9642BCPZ-210

AD9642-210 is a analogue-to-digital converter (ADC) with sampling speeds of up to 250MSPS. This is designed to support communications applications, where low cost, small size, wide bandwidth, and versatility are desired. The ADC core features a multistage, differential pipelined architecture with integrated output error correction logic. The ADC features wide bandwidth inputs that can support a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. A duty cycle stabilizer (DCS) is provided to compensate for variations in the ADC clock duty cycle, allowing the converter to maintain excellent performance. Typical applications are communications, diversity radio systems, multimode digital receivers (3G), TD-SCDMA, WiMAX, WCDMA, CDMA2000, GSM, EDGE, LTE, I/Q demodulation systems, smart antenna systems, general-purpose software radios, ultrasound equipment, broadband data applications.

• Proprietary differential input maintains excellent SNR performance for input frequency up to 350MHz
• 3-pin, 1.8V SPI port for register programming and readback
• LVDS (ANSI-644 levels) outputs, internal ADC voltage reference
• ADC clock duty cycle stabilizer, serial port control, energy saving power-down modes
• Resolution is 14bit
• Offset error is ±11mV max (AVDD=1.8V, DRVDD=1.8V, VIN=−1.0Dbfs, ADC DC)
• Gain error is +3.5/−8%FSR (AVDD=1.8V, DRVDD=1.8V, VIN=−1.0Dbfs, ADC DC)
• 32-lead frame chip scale package [LFCSP-WQ]
• Temperature rating range from −40°C to +85°C

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