LTC6955IUKG#PBF

LTC6955 is a high performance, ultralow jitter, fanout clock buffer with eleven outputs. Its 4-pin parallel control port allows for multiple output setups, enabling any number between three and eleven outputs, as well as a complete shutdown. The parallel port also provides the ability to invert the output polarity of alternating outputs, simplifying designs with top and bottom board routing. Each of the CML outputs can run from DC to 7.5GHz. It is widely used in application such as high performance data converter clocking, SONET, fibre channel, GigE clock distribution, low skew and jitter clock and data fanout, wireless and wired communications, single-ended to differential conversion.

• 11 output buffer
• Eleven ultralow noise CML outputs
• Parallel control for multiple output configurations
• Additive output jitter is 45fs RMS typical (ADC SNR method)
• Frequency range is 7500MHz maximum at (TA = 25°C)
• Self-bias voltage is 2.05V typical at (TA = 25°C)
• Input duty cycle is 50% typical at (TA = 25°C)
• Minimum input slew rate is 100V/µs typical at (TA = 25°C)
• Operating junction temperature is -40°C to 125°C
• Package style is 52-lead plastic QFN

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