S25FS128SAGNFI000

S25FS128SAGNFI000 is an FS-S flash memory. It connects to a host system via a serial peripheral interface (SPI). Traditional SPI single-bit serial input and output (single I/O or SIO) is supported as well as optional 2-bit (Dual I/O or DIO) and 4-bit wide Quad I/O (QIO) or Quad Peripheral Interface (QPI) serial commands. This multiple-width interface is called SPI multi-I/O or MIO. In addition, there are Double Data Rate (DDR) read commands for QIO and QPI that transfer address and read data on both edges of the clock. The FS-S Eclipse architecture features a page programming buffer that allows up to 512 bytes to be programmed in one operation, resulting in faster effective programming and erase than prior generation SPI program or erase algorithms. It offers high densities coupled with the flexibility and fast performance required by a variety of mobile or embedded applications. It is ideal for code shadowing to RAM, executing code directly, XIP, and storing reprogrammable data.

• SPI Multi-I/O, 1.8V, FS-S flash
• 128Mbit density, 133MHz SDR speed
• SPI clock polarity and phase modes 0 and 3
• Serial command subset and footprint compatible with S25FL-A, S25FL-K, S25FL-P, S25FL-S SPI families
• Multi I/O command subset and footprint compatible with S25FL-P, and S25FL-S SPI families
• Commands: Normal, Fast, Dual I/O, Quad I/O, DDR Quad I/O
• Modes: Burst Wrap, Continuous (XIP), QPI
• Serial flash discoverable parameters and common flash interface for configuration information
• Automatic ECC – internal hardware error correction code generation with single-bit error correction
• 8-contact WSON package, industrial temperature range from -40°C to + 85°C