M74HC4094YRM13TR

M74HC4094YRM13TR is a 8-bit SIPO shift latch register. It is fabricated with silicon gate using C²MOS technology. The data is shifted serially through the shift register on the positive going transition of the clock input signal. The output of the last stage (QS) can be used to cascade several devices. Data on the QS output is transferred to a second output (QS’) on the following negative transition of the clock input signal. The data of each stage of the shift register is provided with a latch, which latches data on the negative going transition of the STROBE input signal. When the STROBE input is held high, data propagates through the latch to a 3-state output buffer. This buffer is enabled when OUTPUT ENABLE input is taken high. All inputs are equipped with protection circuits against static discharge and transient excess voltage. They are ideal for automotive, industrial, computer, consumer.

• High speed is fMAX = 80MHz (typ) at VCC = 6V
• Low power dissipation is ICC = 4μA (max) at TA= 25°C
• High noise immunity is VNIH = VNIL = 28% VCC (min)
• Symmetrical output impedance is IOH = IOL = 4mA (min)
• Balanced propagation delays is tPLH ≅ tPHL
• Wide operating voltage range is VCC (opr) is 2V to 6V
• Pin and function compatible with 74 series 4094
• ESD performance CDM: 1kV, HBM: 2kV, MM: 200V
• Temperature range is -40°C to 125°C
• Case style is SO16 (automotive grade)